Resistive random access memory (RRAM) is one possible candidate for next generation nonvolatile memory technology due to its simple and CMOS logic compatible process. The RRAM cell includes a metal oxide material sandwiched between top and bottom electrodes. By applying voltage to the RRAM cell, a switching event from high resistance state (HRS) to low resistance state (LRS) occurs and is called the “set” operation. Conversely, the switching event from LRS to HRS is called the “reset” operation. The low and high resistances are utilized to indicate a digital signal, “1” or “0”, thereby allowing for data storage.